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Title:
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MODULAR MULTIPLICATION ARCHITECTURE FOR PUBLIC KEY CRYPTOSYSTEM |
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Author(s):
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Keon-jik Lee , Byeong-jik Lee , Chong-won Park |
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ISBN:
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972-9027-53-6 |
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Editors:
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Pedro Isaías |
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Year:
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2002 |
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Edition:
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Single |
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Keywords:
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Modular multiplication, Cryptography, Systolic array. |
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Type:
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Full Paper |
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First Page:
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291 |
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Last Page:
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298 |
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Language:
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English |
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Cover:
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Full Contents:
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click to dowload 
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Paper Abstract:
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A new processing element structure and bit level systolic multiplier is proposed for the efficient implementation of Montgomerys multiplication algorithm in RSA cryptosystem. By reorganizing and analyzing the recursive equation of Montgomery algorithm at the Boolean operator level, the critical path delay of the proposed PE is shorter compared with other designs. The critical path delay of the proposed PE is reduced by 20% and 29% when compared to a Walter PE and Guos bit-serial PE, respectively. Furthermore, the area requirement of the proposed PE is 10% smaller than that of a Walter PE. With a continuous data input, the proposed array can produce multiplication results at a rate of one per n + 3 cycles with a latency of 3n + 6 cycles, where n is the bit size of the modulus. The proposed architecture is highly regular, nearest-neighbor connected, and thus well suited for VLSI implementation. |
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