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Title:
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EARLY EXPERIENCES RUNNING THE 3D STENCIL JACOBI METHOD IN INTEL XEON PHI |
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Author(s):
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Mario Hernández, José M. García, José M. Cecilia |
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ISBN:
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978-989-8533-25-8 |
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Editors:
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Hans Weghorn |
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Year:
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2014 |
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Edition:
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Single |
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Keywords:
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ntel Xeon Phi, coprocessor, 3D jacobi, stencil computation. |
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Type:
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Full Paper |
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First Page:
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85 |
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Last Page:
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92 |
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Language:
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English |
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Cover:
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Full Contents:
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click to dowload 
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Paper Abstract:
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Iterative stencil computations are important pattern of computations in different computational fields such as physics or chemistry simulations. A stencil computation repeatedly updates each point of a d-dimensional grid as a function of itself and its near neighbors. As the demand for more and more compute power is growing rapidly in different fields of research, accelerators like GPUs or Xeon Phi are one way to fulfill this requirements. The Intel Xeon Phi coprocessor is based on the Intel Many Integrated Core Architecture and can be programmed with OpenMP, POSIX threads, or MPI. In this work, we present our first experiences with the Intel Xeon Phi. Our goal is to explore whether (and when) there are advantages using the Intel Xeon Phi for processing the 3D Jacobi computations. In this paper we find that, in general, the software based on C/C++ code can be natively executed on the Xeon Phi with no extra recoding. However, whether our code it would run optimally to fully exploit the MIC architecture is a different question. Our optimization path reveals that the Intel Xeon Phi architecture obtains up to 29.4x speed-up factor in performance compared to its sequential counterpart version running on the Intel Xeon. |
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