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Title:      AN NVME FPGA-BASED SMART SWITCH ARCHITECTURE WITH ONLINE RECONFIGURATION
Author(s):      Vinicius G. Linden, Cassiano S. Campes, Lúcio R. Prade, Bruna F. Flesch and Rodrigo M. de Figueiredo
ISBN:      978-989-8704-23-8
Editors:      Pedro Isaías
Year:      2020
Edition:      Single
Keywords:      NVMe, SSD, Smart Switch, HDL, FPGA, Database
Type:      Full
First Page:      68
Last Page:      75
Language:      English
Cover:      cover          
Full Contents:      click to dowload Download
Paper Abstract:      Solid State Drives (SSDs) are replacing the traditional Hard Disk Drives (HDD) in data servers due to its very fast speeds. Furthermore, many researches have proposed improvements in different aspects of its functionality, mainly in hardware and firmware. This transition has released the previous SSDs bandwidth limitations. Cheaper and denser SSDs have facilitated their adoption to replace HDDs. With the introduction of the Non-Volatile Memory Express (NVMe), the performance enhancement revealed a new trend: the bottleneck is now at the main processor, and no longer at the storage. A PCIe switch is employed for any given computer system that uses more than one SSD at a time, but not without its limitations. NVMe commands contain essential information inside each field, which might be needed to define the destination SSD. In other words: a PCIe packet is not an NVMe command. This paper proposes an NVMe switch architecture to be applied in bridging and switching of SSD devices used in databases and web servers. With this approach, the flexible architecture is able to decide how the data is going to be stored based on specific NVMe command fields. The architecture main purpose is to provide a solution for decision criteria based on the contents of one or more NVMe fields. Therefore, an external device or even the host is able to reconfigure switching criteria at run-time. This fact increases control over SSDs. The proposed architecture is flexible and expandable in terms of functionality. Xilinx Vivado Simulator 2019 was used to design and validate the architecture in VHDL.
   

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